![]() The devices offer a fast 12-bit ADC and two ultra-low-power comparators associated with a high-accuracy reference voltage generator. A customer key storage feature may be used to keep the keys hidden. The two AES encryption engines, PKA, and RNG enable lower-layer MAC and upper-layer cryptography. ![]() Portions of the memory can be secured for Cortex® -M0+ exclusive access. The devices feature several mechanisms for embedded flash memory and SRAM: readout protection, write protection and proprietary code readout protection. The devices embed high-speed memories (up to 1 Mbyte of flash memory for STM32WB55xx, up to 512 Kbytes for STM32WB35xx, up to 256 Kbytes of SRAM for STM32WB55xx, 96 Kbytes for STM32WB35xx), a Quad-SPI flash memory interface (available on all packages) and an extensive range of enhanced I/Os and peripherals.ĭirect data transfer between memory and peripherals and from memory to memory is supported by fourteen DMA channels with a full flexible channel mapping by the DMAMUX peripheral. The HSEM provides hardware semaphores used to share common resources between the two processors. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security.Įnhanced inter-processor communication is provided by the IPCC with six bidirectional channels. This core features a Floating point unit (FPU) single precision that supports all Arm® single-precision data-processing instructions and data types. The devices are designed to be extremely low-power and are based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 64 MHz. STM32WB Multiprotocol Wireless Microcontrollers They contain a dedicated Arm® Cortex®-M0+ for performing all the real-time low-layer operations. The STM32WB55xx and STM32WB35xx multiprotocol wireless and ultra-low-power devices embed a powerful and ultra-low-power radio compliant with the Bluetooth® Low Energy SIG specification 5.3 and with IEEE 802.15.4-2011.
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